<?xml version="1.0" encoding= "UTF-8" ?>
<configuration name="RW612" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_17 http://mcuxpresso.nxp.com/XSD/mex_configuration_17.xsd" uuid="97025c7c-9d28-4956-b425-25e2a6e4a00a" version="17" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_17" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
   <common>
      <processor>RW612</processor>
      <package>RW612ETA2I</package>
      <mcu_data>ksdk2_0</mcu_data>
      <cores selected="cm33">
         <core name="Cortex-M33" id="cm33" description=""/>
      </cores>
      <description>Configuration imported from frdm-rw612-xpresso-freertos-builtin</description>
   </common>
   <preferences>
      <validate_boot_init_only>true</validate_boot_init_only>
      <generate_code_modified_registers_only>false</generate_code_modified_registers_only>
      <update_include_paths>true</update_include_paths>
      <generate_registers_defines>false</generate_registers_defines>
   </preferences>
   <tools>
      <pins name="Pins" version="17.0" enabled="false" update_project_code="true">
         <pins_profile>
            <processor_version>N/A</processor_version>
         </pins_profile>
         <functions_list/>
      </pins>
      <clocks name="Clocks" version="15.0" enabled="true" update_project_code="true">
         <clocks_profile>
            <processor_version>24.12.10</processor_version>
         </clocks_profile>
         <clock_configurations>
            <clock_configuration name="BOARD_BootClockRUN" id_prefix="" prefix_user_defined="false">
               <description></description>
               <options/>
               <dependencies>
                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="CAU.xtal_in" description="&apos;XTALIN&apos; (Pins tool id: CAU.xtal_in, Clocks tool id: CAU.XTALIN) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
                     <feature name="routed" evaluation="">
                        <data>true</data>
                     </feature>
                  </dependency>
                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="CAU.xtal_out" description="&apos;XTALOUT&apos; (Pins tool id: CAU.xtal_out, Clocks tool id: CAU.XTALOUT) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
                     <feature name="routed" evaluation="">
                        <data>true</data>
                     </feature>
                  </dependency>
                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="PMU.xtal32k_in" description="&apos;AON_XTAL32K_IN&apos; (Pins tool id: PMU.xtal32k_in, Clocks tool id: PMU.AON_XTAL32K_IN) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
                     <feature name="routed" evaluation="">
                        <data>true</data>
                     </feature>
                  </dependency>
                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="PMU.xtal32k_out" description="&apos;AON_XTAL32K_OUT&apos; (Pins tool id: PMU.xtal32k_out, Clocks tool id: PMU.AON_XTAL32K_OUT) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
                     <feature name="routed" evaluation="">
                        <data>true</data>
                     </feature>
                  </dependency>
                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
                     <feature name="enabled" evaluation="equal" configuration="cm33">
                        <data>true</data>
                     </feature>
                  </dependency>
                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
                     <feature name="enabled" evaluation="equal" configuration="cm33">
                        <data>true</data>
                     </feature>
                  </dependency>
                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
                     <feature name="enabled" evaluation="equal" configuration="cm33">
                        <data>true</data>
                     </feature>
                  </dependency>
               </dependencies>
               <clock_sources>
                  <clock_source id="CAU.XTAL_OSC.outFreq" value="40 MHz" locked="false" enabled="true"/>
               </clock_sources>
               <clock_outputs>
                  <clock_output id="audio_pll_clk.outFreq" value="4246732800/345600007 MHz" locked="false" accuracy=""/>
                  <clock_output id="aux0_pll_clk.outFreq" value="260 MHz" locked="false" accuracy=""/>
                  <clock_output id="avpll_ch1_clkout.outFreq" value="4246732800/345600007 MHz" locked="false" accuracy=""/>
                  <clock_output id="avpll_ch2_clkout.outFreq" value="1415577600/22118401 MHz" locked="false" accuracy=""/>
                  <clock_output id="cau_slp_clk.outFreq" value="4 MHz" locked="false" accuracy=""/>
                  <clock_output id="clk_32k.outFreq" value="32 kHz" locked="false" accuracy=""/>
                  <clock_output id="clk_pmu_sys.outFreq" value="52 MHz" locked="false" accuracy=""/>
                  <clock_output id="els_128m_clk.outFreq" value="128 MHz" locked="false" accuracy=""/>
                  <clock_output id="els_256m_clk.outFreq" value="256 MHz" locked="false" accuracy=""/>
                  <clock_output id="els_64m_clk.outFreq" value="64 MHz" locked="false" accuracy=""/>
                  <clock_output id="ffro_clk_div4.outFreq" value="640/53 MHz" locked="false" accuracy=""/>
                  <clock_output id="hclk.outFreq" value="260 MHz" locked="false" accuracy=""/>
                  <clock_output id="lposc_clk_i.outFreq" value="1 MHz" locked="false" accuracy=""/>
                  <clock_output id="main_clk.outFreq" value="260 MHz" locked="false" accuracy=""/>
                  <clock_output id="main_pll_clk.outFreq" value="260 MHz" locked="false" accuracy=""/>
                  <clock_output id="otp_fuse_32m_clk.outFreq" value="32 MHz" locked="false" accuracy=""/>
                  <clock_output id="refclk_phy.outFreq" value="40 MHz" locked="false" accuracy=""/>
                  <clock_output id="sfro_clk_i.outFreq" value="16 MHz" locked="false" accuracy=""/>
                  <clock_output id="systick_fclk.outFreq" value="260 MHz" locked="false" accuracy=""/>
                  <clock_output id="t3pll_mci_256m.outFreq" value="256 MHz" locked="false" accuracy=""/>
                  <clock_output id="t3pll_mci_48_60m_irc.outFreq" value="2560/53 MHz" locked="false" accuracy=""/>
                  <clock_output id="tcpu_mci_clk.outFreq" value="260 MHz" locked="false" accuracy=""/>
                  <clock_output id="tddr_mci_flexspi_clk.outFreq" value="320 MHz" locked="false" accuracy=""/>
               </clock_outputs>
               <clock_settings>
                  <setting id="CLKCTL0.MAINCLKSELB.sel" value="CLKCTL0.MAINPLLCLKDIV" locked="false"/>
                  <setting id="CLKCTL0.MAINPLLCLKDIV.scale" value="1" locked="true"/>
                  <setting id="CLKCTL0.PMUFCLKDIV.scale" value="5" locked="true"/>
                  <setting id="CLKCTL0.SYSCPUAHBCLKDIV.scale" value="1" locked="true"/>
                  <setting id="CLKCTL0.SYSTICKFCLKSEL.sel" value="CLKCTL0.SYSTICKFCLKDIV" locked="false"/>
                  <setting id="CLKCTL0.WDT0FCLKSEL.sel" value="NO_CLOCK" locked="false"/>
                  <setting id="CLKCTL1.FRGPLLCLKDIV.scale" value="13" locked="true"/>
                  <setting id="CLKCTL1.OSEVENTFCLKSEL.sel" value="NO_CLOCK" locked="false"/>
                  <setting id="REFCLK_SYS_Config" value="Disabled" locked="false"/>
                  <setting id="SYSCTL2.CH1_M.scale" value="2621440" locked="true"/>
                  <setting id="SYSCTL2.CH1_OFFSET_DIV.scale" value="345600007" locked="true"/>
                  <setting id="SYSCTL2.CH2_M.scale" value="2621440" locked="true"/>
                  <setting id="SYSCTL2.CH2_OFFSET_DIV.scale" value="66355203" locked="true"/>
                  <setting id="SYSCTL2.T3_FBDIV.scale" value="64" locked="true"/>
                  <setting id="SYSCTL2.T3_REFDIV.scale" value="1" locked="true"/>
                  <setting id="T3PLL_MCI_213P3M_Config" value="Disabled" locked="false"/>
                  <setting id="T3PLL_MCI_FLEXSPI_Config" value="Disabled" locked="false"/>
                  <setting id="TCPU_MCI_FLEXSPI_CLK_Config" value="Disabled" locked="false"/>
                  <setting id="TDDR_MCI_ENET_CLK_Config" value="Disabled" locked="false"/>
               </clock_settings>
               <called_from_default_init>true</called_from_default_init>
            </clock_configuration>
            <clock_configuration name="BOARD_BootClockLPR" id_prefix="" prefix_user_defined="false">
               <description></description>
               <options/>
               <dependencies>
                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="CAU.xtal_in" description="&apos;XTALIN&apos; (Pins tool id: CAU.xtal_in, Clocks tool id: CAU.XTALIN) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockLPR">
                     <feature name="routed" evaluation="">
                        <data>true</data>
                     </feature>
                  </dependency>
                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="CAU.xtal_out" description="&apos;XTALOUT&apos; (Pins tool id: CAU.xtal_out, Clocks tool id: CAU.XTALOUT) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockLPR">
                     <feature name="routed" evaluation="">
                        <data>true</data>
                     </feature>
                  </dependency>
                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="PMU.xtal32k_in" description="&apos;AON_XTAL32K_IN&apos; (Pins tool id: PMU.xtal32k_in, Clocks tool id: PMU.AON_XTAL32K_IN) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockLPR">
                     <feature name="routed" evaluation="">
                        <data>true</data>
                     </feature>
                  </dependency>
                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="PMU.xtal32k_out" description="&apos;AON_XTAL32K_OUT&apos; (Pins tool id: PMU.xtal32k_out, Clocks tool id: PMU.AON_XTAL32K_OUT) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockLPR">
                     <feature name="routed" evaluation="">
                        <data>true</data>
                     </feature>
                  </dependency>
                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockLPR">
                     <feature name="enabled" evaluation="equal" configuration="cm33">
                        <data>true</data>
                     </feature>
                  </dependency>
                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockLPR">
                     <feature name="enabled" evaluation="equal" configuration="cm33">
                        <data>true</data>
                     </feature>
                  </dependency>
                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockLPR">
                     <feature name="enabled" evaluation="equal" configuration="cm33">
                        <data>true</data>
                     </feature>
                  </dependency>
               </dependencies>
               <clock_sources>
                  <clock_source id="CAU.XTAL_OSC.outFreq" value="40 MHz" locked="false" enabled="true"/>
               </clock_sources>
               <clock_outputs>
                  <clock_output id="aux0_pll_clk.outFreq" value="260 MHz" locked="false" accuracy=""/>
                  <clock_output id="clk_32k.outFreq" value="32 kHz" locked="false" accuracy=""/>
                  <clock_output id="clk_pmu_sys.outFreq" value="52 MHz" locked="false" accuracy=""/>
                  <clock_output id="els_128m_clk.outFreq" value="128 MHz" locked="false" accuracy=""/>
                  <clock_output id="els_256m_clk.outFreq" value="256 MHz" locked="false" accuracy=""/>
                  <clock_output id="els_64m_clk.outFreq" value="64 MHz" locked="false" accuracy=""/>
                  <clock_output id="hclk.outFreq" value="260 MHz" locked="false" accuracy=""/>
                  <clock_output id="main_clk.outFreq" value="260 MHz" locked="false" accuracy=""/>
                  <clock_output id="main_pll_clk.outFreq" value="260 MHz" locked="false" accuracy=""/>
                  <clock_output id="otp_fuse_32m_clk.outFreq" value="32 MHz" locked="false" accuracy=""/>
                  <clock_output id="refclk_phy.outFreq" value="40 MHz" locked="false" accuracy=""/>
                  <clock_output id="refclk_sys.outFreq" value="40 MHz" locked="false" accuracy=""/>
                  <clock_output id="sfro_clk_i.outFreq" value="16 MHz" locked="false" accuracy=""/>
                  <clock_output id="systick_fclk.outFreq" value="260 MHz" locked="false" accuracy=""/>
                  <clock_output id="t3pll_mci_256m.outFreq" value="256 MHz" locked="false" accuracy=""/>
                  <clock_output id="tcpu_mci_clk.outFreq" value="260 MHz" locked="false" accuracy=""/>
               </clock_outputs>
               <clock_settings>
                  <setting id="AVPLL_Init_Config" value="Disabled" locked="false"/>
                  <setting id="CAU_SLP_CLK_Config" value="Disabled" locked="false"/>
                  <setting id="CLKCTL0.MAINCLKSELB.sel" value="CLKCTL0.MAINPLLCLKDIV" locked="false"/>
                  <setting id="CLKCTL0.MAINPLLCLKDIV.scale" value="1" locked="true"/>
                  <setting id="CLKCTL0.SYSOSCBYPASS_SEL.sel" value="NO_CLOCK" locked="false"/>
                  <setting id="CLKCTL0.SYSTICKFCLKSEL.sel" value="CLKCTL0.SYSTICKFCLKDIV" locked="false"/>
                  <setting id="CLKCTL1.CLKOUTSEL1.sel" value="CLKCTL1.CLKOUTSEL0" locked="false"/>
                  <setting id="CLKCTL1.CLKOUTSEL2.sel" value="CLKCTL1.CLKOUTSEL1" locked="false"/>
                  <setting id="CLKCTL1.FRGPLLCLKDIV.scale" value="13" locked="true"/>
                  <setting id="SYSCTL2.T3_FBDIV.scale" value="64" locked="false"/>
                  <setting id="SYSCTL2.TCPU_FBDIV.scale" value="78" locked="true"/>
                  <setting id="SYSCTL2.TCPU_MCI_FLEXSPI_CLK_DIV.scale" value="10" locked="true"/>
                  <setting id="SYSCTL2.TCPU_REFDIV.scale" value="1" locked="true"/>
                  <setting id="T3PLL_MCI_213P3M_Config" value="Disabled" locked="false"/>
                  <setting id="T3PLL_MCI_48_60M_IRC_Config" value="Disabled" locked="false"/>
                  <setting id="T3PLL_MCI_FLEXSPI_Config" value="Disabled" locked="false"/>
                  <setting id="TCPU_MCI_FLEXSPI_CLK_Config" value="Disabled" locked="false"/>
                  <setting id="TDDR_MCI_ENET_CLK_Config" value="Disabled" locked="false"/>
                  <setting id="TDDR_MCI_FLEXSPI_CLK_Config" value="Disabled" locked="false"/>
                  <setting id="TDDR_PLL_Init_Config" value="Disabled" locked="false"/>
               </clock_settings>
               <called_from_default_init>false</called_from_default_init>
            </clock_configuration>
         </clock_configurations>
      </clocks>
      <dcdx name="DCDx" version="4.0" enabled="false" update_project_code="true">
         <dcdx_profile>
            <processor_version>N/A</processor_version>
         </dcdx_profile>
         <dcdx_configurations/>
      </dcdx>
      <periphs name="Peripherals" version="15.0" enabled="false" update_project_code="true">
         <peripherals_profile>
            <processor_version>N/A</processor_version>
         </peripherals_profile>
         <functional_groups/>
         <components/>
      </periphs>
      <tee name="TEE" version="8.0" enabled="false" update_project_code="true">
         <tee_profile>
            <processor_version>N/A</processor_version>
         </tee_profile>
      </tee>
   </tools>
</configuration>