b8( r,friendlyarm,nanopi-r2s-plusrockchip,rk3328 +7FriendlyElec NanoPi R2S Plusaliases=/serial@ff110000E/serial@ff120000M/serial@ff130000U/i2c@ff150000Z/i2c@ff160000_/i2c@ff170000d/i2c@ff180000i/ethernet@ff540000s/usb@ff600000/device@2}/mmc@ff500000/mmc@ff520000cpus+cpu@0cpuarm,cortex-a53xpsci  cpu@1cpuarm,cortex-a53xpsci  cpu@2cpuarm,cortex-a53xpsci  cpu@3cpuarm,cortex-a53xpsci  idle-statespscicpu-sleeparm,idle-state*;Rxcsl2-cache0cacheopp-table-0operating-points-v2opp-408000000Q~@opp-600000000#F~@opp-8160000000,B@@opp-1008000000<@opp-1200000000G(@opp-1296000000M?d @analog-soundsimple-audio-cardi2sAnalog %disabledsimple-audio-card,cpu,simple-audio-card,codec,arm-pmuarm,cortex-a53-pmu06defgA display-subsystemrockchip,display-subsystemT  %disabledhdmi-soundsimple-audio-cardi2sHDMI %disabledsimple-audio-card,cpu,simple-audio-card,codec,psciarm,psci-1.0arm,psci-0.2smctimerarm,armv8-timer06   xin24m fixed-clockZgn6wxin24mEi2s@ff000000(rockchip,rk3328-i2srockchip,rk3066-i2s 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%disabledi2c@ff160000(rockchip,rk3328-i2crockchip,rk3399-i2c 6%+8 i2cpclkdefault(%okaypmic@18rockchip,rk805 )6Zwxin32krk805-clkout29I*default++++(+regulatorsDCDC_REG14vdd_logCWi 4 0regulator-state-memB@DCDC_REG24vdd_armCWi 4 0regulator-state-mem~DCDC_REG34vcc_ddrCWregulator-state-memDCDC_REG4 4vcc_io_33CWi2Z2Zregulator-state-mem2ZLDO_REG14vcc_18CWiw@w@regulator-state-memw@LDO_REG2 4vcc18_emmcCWiw@w@regulator-state-memw@LDO_REG34vdd_10CWiB@B@regulator-state-memB@i2c@ff170000(rockchip,rk3328-i2crockchip,rk3399-i2c 6&+9 i2cpclkdefault, %disabledi2c@ff180000(rockchip,rk3328-i2crockchip,rk3399-i2c 6'+: i2cpclkdefault- %disabledspi@ff190000(rockchip,rk3328-spirockchip,rk3066-spi 61+ spiclkapb_pclk txrxdefault./01 %disabledwatchdog@ff1a0000 rockchip,rk3328-wdtsnps,dw-wdt 6(pwm@ff1b0000rockchip,rk3328-pwm< pwmpclkdefault2 %disabledpwm@ff1b0010rockchip,rk3328-pwm< pwmpclkdefault3 %disabledpwm@ff1b0020rockchip,rk3328-pwm < pwmpclkdefault4%okaypwm@ff1b0030rockchip,rk3328-pwm0 62< pwmpclkdefault5 %disableddma-controller@ff1f0000arm,pl330arm,primecell@6 apb_pclkthermal-zonessoc-thermal%3E6tripstrip-point0Upapassivetrip-point1ULapassive7soc-critUsa criticalcooling-mapsmap0l70q tsadc@ff250000rockchip,rk3328-tsadc% 6:$P$tsadcapb_pclkinitdefaultsleep898B tsadc-apb:%okay  6efuse@ff260000rockchip,rk3328-efuse&P+> pclk_efuse; id@7cpu-leakage@17logic-leakage@19cpu-version@1aOFadc@ff280000.rockchip,rk3328-saradcrockchip,rk3399-saradc( 6PT%saradcapb_pclkV saradc-apb %disabledgpu@ff300000"rockchip,rk3328-maliarm,mali-4500T6ZW]XY[\"fgpgpmmupppp0ppmmu0pp1ppmmu1 buscorefiommu@ff330200rockchip,iommu3 6` aclkifacev %disablediommu@ff340800rockchip,iommu4@ 6bF aclkifacev %disabledvideo-codec@ff350000rockchip,rk3328-vpu5 6 fvdpuF aclkhclk;<iommu@ff350800rockchip,iommu5@ 6 F aclkifacev<;video-codec@ff360000*rockchip,rk3328-vdecrockchip,rk3399-vdec6 6 BABaxiahbcabaccoreAB ׄׄ=<iommu@ff360480rockchip,iommu 6@6@ 6JB aclkifacev<=vop@ff370000rockchip,rk3328-vop7> 6 x;aclk_vopdclk_vophclk_vop axiahbdclk> %disabledport+ endpoint@0?Diommu@ff373f00rockchip,iommu7? 6 ; aclkifacev %disabled>hdmi@ff3c0000rockchip,rk3328-dw-hdmi< 6#Fiahbisfrcec@hdmidefault ABC: %disabledports+port@0endpointD?port@1codec@ff410000rockchip,rk3328-codecA* pclkmclk: %disabledphy@ff430000rockchip,rk3328-hdmi-phyC 6SEysysclkrefoclkrefpclk whdmi_phyZF cpu-version %disabled@clock-controller@ff440000(rockchip,rk3328-crurockchip,crusysconD:Zx=&'(ABDC"\5H4$zEEE|n6n6n6ׄn6#FLGрxhxhрxhxhsyscon@ff450000.rockchip,rk3328-usb2phy-grfsysconsimple-mfdE+usb2phy@100rockchip,rk3328-usb2phyEphyclk wusb480m_phyZ{G%okayGotg-port$6;<=fotg-bvalidotg-idlinestate%okayWhost-port 6> flinestate%okayXmmc@ff5000000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcP@ 6  =!JNbiuciuciu-driveciu-sampleр%okay&7HIJKdefaultBO\iwLmmc@ff5100000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcQ@ 6  >"KObiuciuciu-driveciu-sampleр %disabledmmc@ff5200000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcR@ 6 ?#LPbiuciuciu-driveciu-sampleр%okay7default MNOethernet@ff540000rockchip,rk3328-gmacT 6fmacirq8dWXZYMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macc stmmaceth:%okaydfPPinputQrgmiiRdefault$mdiosnps,dwmac-mdio+ethernet-phy@1Sdefault'!P 3)Qethernet@ff550000rockchip,rk3328-gmacU: 6fmacirq8TSSUVIstmmacethmac_clk_rxmac_clk_txclk_mac_refaclk_macpclk_macclk_macphyb stmmacethrmiiToutput %disabledmdiosnps,dwmac-mdio+ethernet-phy@04ethernet-phy-id1234.d400ethernet-phy-ieee802.3-c22VddefaultUV?Tusb@ff5800002rockchip,rk3328-usbrockchip,rk3066-usbsnps,dwc2X 6MotgQhostYkz@ W usb2-phy%okayusb@ff5c0000 generic-ehci\ 6 NGXusb%okayusb@ff5d0000 generic-ohci] 6 NGXusb%okayusb@ff600000rockchip,rk3328-dwc3snps,dwc3` 6C`aref_clksuspend_clkbus_clkQhost utmi_wide  '%okay+device@2 usbbda,8153interrupt-controller@ff811000 arm,gic-400 @ Q@ @ `  6 crypto@ff060000rockchip,rk3328-crypto@ 6PQ;hclk_masterhclk_slavesclkD crypto-rstpinctrlrockchip,rk3328-pinctrl:+ fgpio@ff210000rockchip,gpio-bank! 639I Q @egpio@ff220000rockchip,gpio-bank" 649I Q @)gpio@ff230000rockchip,gpio-bank# 659I Q @igpio@ff240000rockchip,gpio-bank$ 669I Q @pcfg-pull-up m[pcfg-pull-down zcpcfg-pull-none Ypcfg-pull-none-2ma  bpcfg-pull-up-2ma m pcfg-pull-up-4ma m \pcfg-pull-none-4ma  _pcfg-pull-down-4ma z pcfg-pull-none-8ma  ]pcfg-pull-up-8ma m ^pcfg-pull-none-12ma  `pcfg-pull-up-12ma m apcfg-output-high pcfg-output-low pcfg-input-high m Zpcfg-input i2c0i2c0-xfer YY'i2c1i2c1-xfer YY(i2c2i2c2-xfer  YY,i2c3i2c3-xfer YY-i2c3-pins YYhdmi_i2chdmii2c-xfer YYBpdm-0pdmm0-clk Ypdmm0-fsync Ypdmm0-sdi0 Ypdmm0-sdi1 Ypdmm0-sdi2 Ypdmm0-sdi3 Ypdmm0-clk-sleep Zpdmm0-sdi0-sleep Zpdmm0-sdi1-sleep Zpdmm0-sdi2-sleep Zpdmm0-sdi3-sleep Zpdmm0-fsync-sleep Ztsadcotp-pin  Y8otp-out  Y9uart0uart0-xfer  Y[ uart0-cts  Y!uart0-rts  Y"uart0-rts-pin  Yuart1uart1-xfer Y[#uart1-cts Y$uart1-rts Y%uart1-rts-pin Yuart2-0uart2m0-xfer Y[uart2-1uart2m1-xfer Y[&spi0-0spi0m0-clk [spi0m0-cs0  [spi0m0-tx  [spi0m0-rx  [spi0m0-cs1  [spi0-1spi0m1-clk [spi0m1-cs0 [spi0m1-tx [spi0m1-rx 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aaaaaaaaOpwm0pwm0-pin Y2pwm1pwm1-pin Y3pwm2pwm2-pin Y4pwmirpwmir-pin Y5gmac-1rgmiim1-pins`  ] __]___ _ _] ]__]]] ]_]]]]Rrmiim1-pins b`bbbb b b` ` Y YYYYYgmac2phyfephyled-speed10 Yfephyled-duplex Yfephyled-rxm1 YUfephyled-txm1 Yfephyled-linkm1 YVtsadc_pintsadc-int  Ytsadc-pin  Yhdmi_pinhdmi-cec YAhdmi-hpd cCcif-0dvp-d2d9-m0 YYYYY Y Y YYYYYcif-1dvp-d2d9-m1 YYYYYYYYYYYYbuttonreset-button-pin Ydgmac2ioeth-phy-reset-pin cSledslan-led-pin Yfsys-led-pin Ygwan-led-pin Yhlanlan-vdd-pin Ylpmicpmic-int-l [*sdsdio-vcc-pin [jchosen serial2:1500000n8gmac-clock fixed-clockgsY@ wgmac_clkinZPkeys gpio-keysddefaultkey-reset reset 9e  2leds gpio-leds fghdefaultled-0 9i nanopi-r2s:green:lanled-1 9e nanopi-r2s:red:sys onled-2 9i nanopi-r2s:green:wansdmmcio-regulatorregulator-gpio  9)jdefault 4vcc_io_sdioCiw@2Z ' Bvoltage Qw@2Z bsdmmc-regulatorregulator-fixed mekdefault4vcc_sdWi2Z2Z bLvdd-5vregulator-fixed4vdd_5vCWiLK@LK@+vdd-5v-lanregulator-fixed  mildefault 4vdd_5v_lanCW b+ compatibleinterrupt-parent#address-cells#size-cellsmodelserial0serial1serial2i2c0i2c1i2c2i2c3ethernet0ethernet1mmc0mmc1device_typeregclocks#cooling-cellscpu-idle-statesdynamic-power-coefficientenable-methodnext-level-cacheoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namestatussound-daiinterruptsinterrupt-affinityports#clock-cellsclock-frequencyclock-output-namesclock-namesdmasdma-names#sound-dai-cellspinctrl-namespinctrl-0pinctrl-1pmuio-supplyvccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplygpio-controller#gpio-cells#power-domain-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loaderreg-io-widthreg-shiftrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-on-in-suspendregulator-suspend-microvolt#pwm-cellsarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaysustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicecontributionassigned-clocksassigned-clock-ratespinctrl-2resetsreset-namesrockchip,grfrockchip,hw-tshut-temp#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarityrockchip,efuse-sizebits#io-channel-cellsinterrupt-names#iommu-cellsiommuspower-domainsremote-endpointphysphy-namesnvmem-cellsnvmem-cell-names#phy-cells#reset-cellsassigned-clock-parentsfifo-depthmax-frequencybus-widthcap-sd-highspeeddisable-wpsd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplycap-mmc-highspeedmmc-hs200-1_8vnon-removablesnps,txpblclock_in_outphy-handlephy-modephy-supplyrx_delaysnps,aaltx_delayreset-assert-usreset-deassert-usreset-gpiosphy-is-integrateddr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephy_typesnps,dis-del-phy-power-chg-quirksnps,dis_enblslpm_quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis_u3_susphy_quirk#interrupt-cellsinterrupt-controllerrangesbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathlabellinux,codedebounce-intervaldefault-stateenable-active-highregulator-settling-time-usregulator-typestartup-delay-usvin-supplygpio